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QCIM RoT

QCIM Root of Trust combines hardware-bound identity and secure-element protection with the reprogrammable QCIM Engine, creating a hardware trust anchor whose cryptographic capabilities can evolve after deployment.

  • Device authentication and hardware-bound identity
  • Code verification and protected execution
  • Secret and credential protection
  • Authorization of sensitive changes
  • Secure cryptographic updates throughout the product lifecycle
QCIM security stack

Where QCIM Root of Trust sits in the stack.

The Engine executes the cryptography, the Root of Trust establishes device trust, and the Platform maintains that trust after deployment.

A Root of Trust built for cryptographic change.

Designed for high-security applications, QCIM RoT delivers the benefit of crypto agility in a small, secure root-of-trust usable as semiconductor IP, and soon as a standalone chip. Fully featured with anti-tamper systems, secure boot, and supply-chain security to bring trust to any chip.

Three stacked isometric layers: crypto-agile trust, hardware-bound identity and physical protection, and built for long-lifecycle deployment
01

Crypto-agile trust

Supports classical cryptography and PQC standards from NIST. Capable of supporting diverse PQC roadmaps from the EU, Korea, and other countries through secure update mechanisms.

02

Hardware-bound identity and physical protection

Combines state-of-the-art VIA PUF™ from ICTK, tamper detection, and side-channel masking to provide strong resistance to physical attacks. These mechanisms form an unassailable identity against quantum computing, AI, and supply-chain attacks.

03

Built for long-lifecycle deployment

Achieves industry-standard security and performance expectations at extremely small power and area footprints. Designed for a diverse range of end-use requirements in defense, automotive, IoT, and mission-critical sectors.

What the root protects.

01

Identity

PUF-derived device identity, root key and credential protection.

02

Boot and execution integrity

Secure boot, firmware verification and protected execution.

03

Physical protection

Tamper detection, side-channel protection, fault detection and zeroization.

04

Lifecycle control

Controlled debug, authorized updates, crypto-kernel updates and security-state management.

Product architecture.

Hardware-bound identity

ICTK VIA PUF™

A physically unclonable function supplies the device identity and root key, with no stored secret to extract.

Crypto agility

BTQ QCIM Engine

Versioned cryptographic kernels let the root support classical and post-quantum algorithms, and change them after deployment.

Protection and lifecycle control

Secure-element architecture

Secure boot, memory protection, tamper and fault response, controlled debug, and authorized security-state changes.

Reference

Key features and specs.

System specifications

Memory64 KB boot ROM, 64 KB system SRAM, and 512 KB embedded flash
EntropyNIST SP 800-90A/B targeted TRNG/DRBG
InterfacesSPI, I²C, ISO/IEC 7816, and GPIO interfaces
Power modesFour operating modes, including low-power and power-down
TemperatureTarget operating range of -40°C to 105°C
CertificationCommon Criteria PP-0084b EAL5+ certification target

Cryptographic subsystem

AcceleratorReprogrammable QCIM compute-in-memory accelerator
Datapath1024-bit parallel cryptographic datapath
MemoryDedicated 32 KB data SRAM and 6 KB kernel memory
AlgorithmsML-KEM, ML-DSA, AES, SHA-3, and SHAKE support
UpdatesVersioned kernels for post-deployment algorithm updates
MaskingHardware and software masking support

Data and physical protection

Identity256-bit PUF-derived root key and chip identity
ExecutionSecure CPU core with hardware Memory Protection Unit
BootSecure boot and authenticated firmware execution
LifecycleControlled debug, test, and lifecycle access
CredentialsPUF-derived protection for stored credentials and keys
TransportMasked AHB-Lite and APB address and data paths
StorageSRAM and embedded-flash scrambling
IntegritySECDED integrity protection
KeysKey blinding and cryptographic-kernel verification
StateAnti-tearing and atomic security-state updates
TamperActive shield and integrated tamper sensors
FaultFault detection, error response, and zeroization paths

Evaluate QCIM RoT for your architecture.

Request technical specifications, evaluation IP, or a consultation with our hardware security team.

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